Efficient and Scalable Cache Coherence for Chip Multiprocessors
(Paperback)

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Chip multiprocessors (CMPs) constitute the new trend for increasing the performance of future computers. In the near future, chips with tens of cores will become more popular. Nowadays, directory-based protocols constitute the best alternative to keep cache coherence in large-scale systems. Nevertheless, directory-based protocols have two important issues that prevent them from achieving better scalability: the directory memory overhead and the long cache miss latencies. This book focuses on these key issues. The first proposal is a scalable distributed directory organization that copes with the memory overhead of directory-based protocols. The second proposal presents the direct coherence protocols, which are aimed at avoiding the indirection problem of traditional directory-based protocols and, therefore, they improve applications' performance. Finally, a novel mapping policy for distributed caches is presented. This policy reduces the long access latency while lessening the number of off-chip accesses, leading to improvements in applications' execution time.

AuthorAlberto Ros
BindingPaperback
EAN9783838341521
FormatImport
ISBN383834152X
Height866 mm
Length591 mm
Width45 mm
Weight65 g
LanguageEnglish
Language TypePublished
Number Of Items1
Number Of Pages196
Product GroupBook
Publication Date2010-06-24
PublisherLAP Lambert Academic Publishing
StudioLAP Lambert Academic Publishing
Sales Rank622369

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